- NTB模式，应该是base mode or virtual mdoe?
virtual switch mode, 因为前提是必须多个host能够连接上。
作为NTB模式，哪个port 可用配置为downstream port？
- 发现NTB link endpoint, 需要哪些软硬件设置？
base mode VS. virtual mode
Base mode – PEX 8748 acts as a standard PCI Express switch, supporting one Host hierarchy (also named conventional mdoe). The PEX 8748 allows users to configure the switch as a single hierarchy of PCI-to-PCI bridges.
Virtual Switch mode – PEX 8748 supports up to six Hosts, creating up to six virtual switches within the PEX 8748, each with its own virtual hierarchy
* INTA# (PEX_INTA# (Base mode) or VSx_PEX_INTA# (Virtual Switch mode)) and FATAL
* ERROR (FATAL_ERR# (Base mode) or VSx_FATAL_ERR# (Virtual Switch mode))
• 12 independent Ports
• Choice of Link width (quantity of Lanes) per unique Link/Port – x4, x8, or x16,
depending upon Port configuration; x1 and x2 Link widths are also supported
• Configurable with serial EEPROM, I2C, SMBus, and/or Host software
• Designate any Port as the Upstream Port (Port 0 is recommended in Base mode)
NTB or not
– Up to six Upstream Ports supported
– 1+1 Host Failover (one active and one backup)
– N+1 Host Failover (N active and one backup)
– Supported in both Transparent and Non-Transparent modes
Non-Transparent (NT) Bridging
– Program any one Downstream Port as the Upstream NT Port
– Enables Dual-Host, Dual-Fabric, Host-Failover applications
– Moveable Upstream Port
– Cross-link Port capability
virtual switch and failover
Virtual Switch Mode (Multi-Host) and Failover Support
In Virtual Switch mode, the PEX 8748 can be configured with up to six Upstream Host Ports, each with
its own dedicated Downstream Ports. The PEX 8748 can be configured for 1+1 or N+1 Host
redundancy. The PEX 8748 allows the Hosts to communicate their status to one another, using special
In Failover mode, if a Host fails, the Host designated for failover disables the Upstream Port attached to
the failing Host, then programs the Downstream Ports of that Host to its own domain. Figure 2-1a
illustrates a two-Host system in Virtual Switch mode, with two virtual switches within the PEX 8748.
Dual-Host and Failover Support – NT Mode
The PEX 8748 supports a single Non-Transparent (NT) Port (Figure 2-2), which enables the
implementation of dual-Host systems for redundancy and Host failover capability. The NT Port allows
systems to isolate Host memory domains, by presenting the processor subsystem as an endpoint, rather
than as another memory system:
• Base Address registers (BARs) are used to translate addresses
• Doorbell registers are used to signal interrupts between the address domains
• Scratchpad registers are accessible from both address domains, to allow
An NT bridge (NTB) is comprised of two back-to-back Type 0 endpoints. One of the endpoints is
“found” by the Host that is enumerating the PCI Express Link – that is the Link side endpoint, or
NT Port Link Interface. The other endpoint is “found” by the Host enumerating the internal virtual PCI
Bus – that is the Virtual side endpoint, or NT Port Virtual Interface.
The NTB connects two different Host domains. Each NT endpoint has up to four Base Address
registers, BAR2 through BAR5, that can point to a window within the other Host’s Address space.
The PEX 8748’s NT endpoints show up to software as if they are separate devices Downstream of a
NT mode is enabled if the STRAP_NT_UPSTRM_PORTSEL[2:0] 3-state inputs are not all pulled or
tied High to VDD18. Valid values on these 3-state inputs are 0, Z (floating), and 1, and when used
together, provide 27 possible combinations, of which values within the ranges of 0 through 3, 8 through
11, and 16 through 19 represent corresponding Port Numbers. The selected value determines which
Port is assigned to be the NT Port. The Port Numbers listed above do not exist in all Port configurations,
and the programmed value must correspond to a valid Port Number; otherwise, that value is Reserved.
Table 14-1 lists the 27 combinations for the three 3-state inputs, and their equivalent binary and decimal
values (indicating register values and Port Numbers), in incrementing order of the 3-state encoding.
Alternately, I2C, software, and/or an optional serial EEPROM (if present) can enable NT, by Setting the
VS0 Upstream register NT Enable bit (Base mode – Port 0; Virtual Switch mode – Port 0, accessible
through the Management Port, offset 360h). The NT Port is determined by the register’s NT Port